Conventional VLSI circuits typically perform computational procedures using voltages and currents for both input and output signals. With technology scaling, the degrees of freedom for using voltages and currents for computations are generally more restricted. This can result in computational circuits that exhibit a poor signal-to-noise ratio (SNR), very limited Dynamic Range (DR), and/or high power consumption.
These factors are likely to be significant impediments to the development of more efficient and more effective analog computation circuits in the future, especially in light of the problems posed by technology scaling. Complementary metal-oxide semiconductor (CMOS) process technology, in particular, has lead to scaling that requires significant reductions in the chip “real estate” consumed by analog circuitry. Moreover, as CMOS process technology continues to shrink the usable voltage swing in such circuits, traditional analog circuit designs have been rendered less practicable. Thus there is a need for an alternative to conventional voltage-based and current based computations.